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Semiconductor Process6 min read

Yield Engineering: From Die Yield to Wafer Yield

Ever wondered about wafer fab yield numbers but felt lost? This practical article introduces you to the world of wafer yield, using a vivid "pineapple field" analogy to clarify die yield, wafer yield, and what happens to defective chips. You'll learn how to pinpoint root causes from data, determining whether issues stem from equipment or processes, making crucial semiconductor knowledge accessible.

That Day the CPK Report Came Out, and the Whole Room Fell Silent for Three Seconds

I still remember years ago, when our new process was in pilot production, everything was running smoothly, and everyone thought it was a sure thing this time. But when the yield report came out, WIP was cut in half, and the atmosphere on the production line instantly froze. The boss, with an ashen face, asked, "For this batch of wafers, some dies are perfectly fine, while others are completely defective. Where exactly is the problem? Is it the equipment or the process?" Back then, I was still a rookie, only knowing that yield was crucial, but finding the problem from a pile of data was truly confusing. Today, I'm going to talk to you about Yield Engineering, from Die Yield to Wafer Yield, which, in essence, is about how to identify those "defective" ones.

Where's the Problem? What Exactly Does Yield Look At?

Frankly, the core of Yield Engineering is to understand why some dies are good and some are bad. Imagine an entire wafer as a large pineapple field, covered with pineapples (dies). Wafer Yield is about how many pineapples in this entire field are well-grown and marketable. But if there are rotten pineapples in the field, we need to analyze whether it's due to too much water causing root rot, pest infestation, or a poor variety.

Die Yield specifically looks at the quality of each individual pineapple. It examines whether each pineapple meets our preset standards. For example, if a designed circuit's measured resistance value should ideally be 100 ohms but measures 150 ohms, that die might be classified as defective. We then accumulate these defective dies to calculate what proportion of the wafer is acceptable.

So the key is, we don't just look at the final yield numbers; we need to delve deeper to analyze the root causes of defective dies.

How Is It Actually Done?

We typically start by looking at a few charts.

  1. Bin Map (Defect Distribution Map): This map indicates all defective dies on the wafer. If defective points are concentrated at the wafer edges, it might be related to the edge process, such as uneven etching. If defective points show a random distribution, it is highly likely due to dust or particle contamination.

  1. Pareto Chart: This chart arranges all defective items (e.g., short circuits, open circuits, leakage) from highest to lowest frequency of occurrence. This tells you which failure mode is the "major contributor" to yield reduction. For instance, if 80% of defects are due to "short circuits," then we prioritize resolving the short circuit problem.

  1. Process Capability Index (Cpk): Although this indicator doesn't directly look at yield, it is extremely important. If the Cpk value is too low, for example, if you see a Cpk of only 1.08, it indicates that your process capability is not stable enough, and products can easily fall outside specifications. When Cpk is too low, even if the yield is temporarily acceptable, it means your process is very close to failure.

So, in essence, it's about using these tools to investigate from two angles: "where it failed" and "why it failed."

The Most Common Pitfalls

The biggest pitfall I've encountered is when yield numbers are poor, and everyone just blames the parameters of the previous process step for not being adjusted correctly. One time, wafer yield consistently stayed low, with several wafers only around 60%. Everyone was blaming each other, claiming it was due to uneven film thickness from the CVD equipment. However, a few colleagues and I carefully examined the Bin Map and found that the defects showed a very clear "ring-shaped distribution," concentrated in the "inner ring" area of the wafer.

We retrieved the historical data for that batch of wafers and discovered that the problem wasn't with CVD. Instead, during the preceding Cleaning step, a cleaning solution nozzle was clogged, leading to an ineffective cleaning in the central area of the wafer, leaving behind contaminants. These contaminants were then magnified in subsequent processes, causing the ring-shaped defects. After that incident, we learned that when yield is poor, don't rush to assign blame; review the data charts at hand, and the truth might just surprise you.

One Thing You Can Do Today

Take out your yield report and start by looking at the Bin Map.

Want to try it yourself?

Every tool mentioned in this article is available on InsightFab — just upload a CSV to analyze.

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