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Semiconductor Process6 min read

Sampling Strategy Design for In-line Metrology

This article delves into the critical role of sampling strategies in production lines. It addresses a common dilemma where high CPK and low DPMO fail to translate into improved yield. Starting with a real-world case featuring a CPK of just 1.08, the article highlights how flawed sampling can lead to misleading data and why a well-designed sampling strategy is essential for in-line metrology, ensuring data truly reflects process performance.

That Day, the CPK Report Silenced the Room for Three Seconds

I still remember years ago, when our new process just launched, and the yield kept getting stuck. Back then, everyone was chasing data daily, and the pressure was immense. Once, the PM stared at the in-line metrology CPK report, and the striking 1.08 on the screen suddenly quieted everyone. To be honest, this number was a long way from our target of 1.33. The PM's face turned ashen, and he asked directly, "Can your measurement data truly represent the process?" As soon as he said that, everyone exchanged glances, because frankly, our confidence in the sampling strategy wasn't high either.

What Was the Problem?

To put it simply, many times our measurement data looks great, CPK is high, DPMO is low, yet the yield just won't improve. Why? It's simple: your data might just be an "illusion." Especially in the world of In-line Metrology, we can't measure every single product. The cost is too high, the time too long; it's simply not practical. Therefore, we must "sample."

This "sampling" is the key. If your sampling logic is flawed, the measured data cannot truly reflect the condition of the entire lot. It's like going to the supermarket to buy fruit, only picking the top three apples, and then discovering when you get home that the ones underneath are all rotten. This is sampling bias. In a semiconductor fab, this can lead you to believe the process is stable, only to discover issues when products reach the customer, which can be devastating.

So the key point is: your sampling strategy must be able to effectively "represent" the process condition of your entire lot, rather than just measuring the good ones or measuring randomly.

How Is It Done in Practice?

Designing a sampling strategy involves several aspects to consider. I'll mention a few of the most commonly used ones:

  1. Within-lot Variation: Does your process exhibit variation within the same lot, from the first piece to the last? For example, some equipment may experience slight changes in temperature or pressure after long periods of operation. If you only measure the first few pieces in a lot, you might overlook problems occurring later. In such cases, you might need to take a few pieces from the beginning, middle, and end of the lot for measurement, or even consider measuring every few pieces, for example, "1 piece out of every 5."

  1. Within-wafer Variation: Even on the same wafer, the process performance at the edge and center points might differ. For instance, if your etching process has an under-etching issue at the wafer edge, but you only measure the wafer's center point, you will never discover it. Therefore, when sampling on a wafer, in addition to the center point, different locations such as the edges, top, bottom, left, and right should also be considered. Common methods like nine-point measurement and five-point measurement are designed to address this.

  1. Process Stability: If your process is extremely stable, with CPK often exceeding 2.0 and DPMO almost zero, you can slightly reduce the sampling frequency. However, if the process is like a rollercoaster, with CPK at 1.08 one moment and dropping to 0.8 the next, then you might need to increase the sampling frequency, or even consider 100% measurement.

To give specific numbers, let's assume a lot has 25 wafers. If your process stability is not high, you might need to adopt a frequency of "measure 1 wafer out of every 5," meaning 5 wafers are measured per lot. Then, each wafer undergoes "nine-point measurement" to ensure comprehensive data within the wafer. This way, a total of 5 \* 9 = 45 data points will be generated for one lot. These data points can provide more reliable process information.

The Most Common Pitfalls

The most common pitfall I've seen is "continuing to use old sampling strategies." Many times, when a new process goes online, people simply copy and paste the sampling frequency and measurement points from an old process. What's the result? The old process might have been running for ten years, with extremely high stability, allowing for a very low sampling frequency. However, a new process is just starting, with many variables, and using the old low-frequency sampling simply won't catch the problems.

Another pitfall is "sacrificing sampling to save money." Measurement equipment is expensive, and measurement time costs money, so people often try every possible way to reduce the number of measurements. The result is that when yield problems arise, the data you have is utterly insufficient to help you pinpoint the issue, leading to more wasted time and money on debugging.

To be honest, there's no standard answer for designing sampling strategies; it's simply a trade-off between "cost" and "information completeness."

One Thing You Can Do Today

Go back and review your current sampling strategy, and ask yourself: "Does this strategy truly represent my process?"

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